1. Field of the Invention
The present invention generally relates to dynamic complementary metal-oxide semiconductor (CMOS) circuits and, more particularly, to high speed CMOS circuits with improved noise immunity.
2. Description of the Related Art
In many high speed clocked dynamic CMOS circuit applications, a receiver circuit in the form of a stack of field effect transistor (FET) devices are driven by a clock signal and an input data signal. Often the input data signal is driven directly into a NFET (n-type FET) device; however, such a receiver circuit lacks noise immunity, the noise margin being controlled by the size of the NFET device. A costly fix to this problem is to buffer the input data signal with static inverters.